DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 657

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.3
The D/A converter module has two built-in D/A converter circuits that can operate independently.
D/A conversion is performed continuously whenever enabled by the D/A control register (DACR).
When a new value is written in DADR0 or DADR1, conversion of the new value begins
immediately. The converted result is output by setting the DAOE0 or DAOE1 bit to 1.
An example of conversion on channel 0 is given next. Figure 19.2 shows the timing.
Address
DADR0
DAOE0
DA0
Legend:
t
DCONV
Software writes the data to be converted in DADR0.
D/A conversion begins when the DAOE0 bit in DACR is set to 1. After the elapse of the
conversion time, analog output appears at the DA0 pin. The output value is AVref
value)/256.
This output continues until a new value is written in DADR0 or the DAOE0 bit is cleared to 0.
If a new value is written in DADR0, conversion begins immediately. Output of the converted
result begins after the conversion time.
When the DAOE0 bit is cleared to 0, DA0 becomes an input pin.
: D/A conversion time
Operation
DADR0
write cycle
High-impedance state
Figure 19.2 D/A Conversion (Example)
DACR
write cycle
Conversion data (1)
t
DCONV
Conversion result (1)
Rev. 4.00 Sep 27, 2006 page 611 of 1130
DADR0
write cycle
t
DCONV
Section 19 D/A Converter
Conversion data (2)
Conversion result (2)
REJ09B0327-0400
DACR
write cycle
(DADR