DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 27

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 Overview
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview...........................................................................................................................
Internal Block Diagram.....................................................................................................
Pin Arrangement and Functions........................................................................................ 10
1.3.1
1.3.2
1.3.3
Overview........................................................................................................................... 35
2.1.1
2.1.2
2.1.3
2.1.4
CPU Operating Modes ...................................................................................................... 38
Address Space................................................................................................................... 43
Register Configuration...................................................................................................... 44
2.4.1
2.4.2
2.4.3
2.4.4
Data Formats..................................................................................................................... 49
2.5.1
2.5.2
Instruction Set ................................................................................................................... 52
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
Addressing Modes and Effective Address Calculation ..................................................... 65
2.7.1
2.7.2
Processing States............................................................................................................... 73
2.8.1
2.8.2
2.8.3
2.8.4
Pin Arrangement .................................................................................................. 10
Pin Functions in Each Operating Mode ............................................................... 13
Pin Functions ....................................................................................................... 26
Features................................................................................................................ 35
Differences between H8S/2600 CPU and H8S/2000 CPU .................................. 36
Differences from H8/300 CPU ............................................................................ 37
Differences from H8/300H CPU.......................................................................... 37
Overview.............................................................................................................. 44
General Registers ................................................................................................. 45
Control Registers ................................................................................................. 46
Initial Register Values.......................................................................................... 48
General Register Data Formats ............................................................................ 49
Memory Data Formats ......................................................................................... 51
Overview.............................................................................................................. 52
Instructions and Addressing Modes ..................................................................... 53
Table of Instructions Classified by Function ....................................................... 55
Basic Instruction Formats .................................................................................... 64
Notes on Use of Bit-Manipulation Instructions ................................................... 65
Addressing Mode................................................................................................. 65
Effective Address Calculation ............................................................................. 69
Overview.............................................................................................................. 73
Reset State............................................................................................................ 74
Exception-Handling State .................................................................................... 75
Program Execution State...................................................................................... 76
...................................................................................................................... 35
.............................................................................................................
Contents
Rev. 4.00 Sep 27, 2006 page xxv of xliv
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