DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 183

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Table 5.6
Interrupt Control Mode
0
1
Legend:
*: Don’t care
Default Priority Determination
The priority is determined for the selected interrupt, and a vector number is generated.
If the same value is set for ICR, acceptance of multiple interrupts is enabled, and so only the
interrupt source with the highest priority according to the preset default priorities is selected and
has a vector number generated.
Interrupt sources with a lower priority than the accepted interrupt source are held pending.
Table 5.7 shows operations and control signal functions in each interrupt control mode.
Table 5.7
Legend:
O:
IM: Used as interrupt mask bit
PR: Sets priority
—:
Control Mode
Interrupt
Interrupt operation control performed
Not used
0
1
Interrupts Selected in Each Interrupt Control Mode
Operations and Control Signal Functions in Each Interrupt Control Mode
INTM1
0
0
Setting
INTM0
Interrupt Mask Bits
I
0
1
0
1
0
1
O
O
Interrupt Acceptance Control
UI
*
*
*
0
1
3-Level Control
IM
IM
I
Selected Interrupts
All interrupts (control level 1 has priority)
NMI and address break interrupts
All interrupts (control level 1 has priority)
NMI, address break and control level 1
interrupts
NMI, and address break interrupts
IM
UI
Rev. 4.00 Sep 27, 2006 page 137 of 1130
ICR
PR
PR
Section 5 Interrupt Controller
Default Priority
Determination
O
O
REJ09B0327-0400
(Trace)
T

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