DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 339

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.1.3
Table 10.1 lists the pins used by the PWM (D/A) module.
Table 10.1 PWM Timer Input and Output Pins
10.1.4
Table 10.2 lists the registers of the PWM (D/A) module.
Table 10.2 Register Configuration
Notes: 1. Lower 16 bits of the address.
Name
PWM output pin 0
PWM output pin 1
Name
PWM D/A control register
PWM D/A data register A high
PWM D/A data register A low
PWM D/A data register B high
PWM D/A data register B low
PWM D/A counter high
PWM D/A counter low
Module stop control register
2. Registers in the 14-bit PWM timer are assigned to the same addresses as the other
Pin Configuration
Register Configuration
registers. In this case, register selection is performed by the IICE bit in the serial timer
control register (STCR), and also the same addresses are shared by DADRAH and
DACR, and by DADRB and DACNT. Switching is performed by the REGS bit in DACNT
or DADRB.
Abbr.
PWX0
PWX1
Abbreviation
DACR
DADRAH
DADRAL
DADRBH
DADRBL
DACNTH
DACNTL
MSTPCRH
MSTPCRL
I/O
Output
Output
Rev. 4.00 Sep 27, 2006 page 293 of 1130
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Section 10 14-Bit PWM Timer (PWMX)
Function
PWM output, channel A
PWM output, channel B
Initial value
H'30
H'FF
H'FF
H'FF
H'FF
H'00
H'03
H'3F
H'FF
REJ09B0327-0400
Address *
H'FFA0 *
H'FFA0 *
H'FFA1 *
H'FFA6 *
H'FFA7 *
H'FFA6 *
H'FFA7 *
H'FF86
H'FF87
2
2
2
2
2
2
2
1