DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 469

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
15.1
This LSI are equipped with a 3-channel serial communication interface (SCI). The SCI can handle
both asynchronous and clocked synchronous serial communication. A function is also provided for
serial communication between processors (multiprocessor communication function).
One of the three SCI channels can transmit and receive IrDA communication waveforms based on
IrDA specification version 1.0.
15.1.1
SCI features are listed below.
Choice of asynchronous or synchronous serial communication mode
Asynchronous mode:
Section 15 Serial Communication Interface (SCI, IrDA)
Serial data communication is executed using an asynchronous system in which
synchronization is achieved character by character
Serial data communication can be carried out with standard asynchronous communication
chips such as a Universal Asynchronous Receiver/Transmitter (UART) or Asynchronous
Communication Interface Adapter (ACIA)
A multiprocessor communication function is provided that enables serial data
communication with a number of processors
Choice of 12 serial data transfer formats
Data length:
Stop bit length:
Parity:
Multiprocessor bit:
Receive error detection: Parity, overrun, and framing errors
Break detection:
Overview
Features
7 or 8 bits
1 or 2 bits
Even, odd, or none
1 or 0
Break can be detected by reading the RxD pin level
directly in case of a framing error
Section 15 Serial Communication Interface (SCI, IrDA)
Rev. 4.00 Sep 27, 2006 page 423 of 1130
REJ09B0327-0400

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