DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 700

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 22 ROM
Table 22.5 Flash Memory Erase Blocks
128-kbyte Versions
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbyte)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
EB8 (32 kbytes)
EB9 (32 kbytes)
22.5.4
STCR is an 8-bit readable/writable register that controls register access, the IIC operating mode
(when the on-chip IIC option is included), and on-chip flash memory control (in F-ZTAT
versions), and also selects the TCNT input clock. For details on functions not related to on-chip
flash memory, see section 3.2.4, Serial Timer Control Register (STCR), and descriptions of
individual modules. If a module controlled by STCR is not used, do not write 1 to the
corresponding bit.
STCR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 4—I
these bits control the operation of the I
Interface.
Rev. 4.00 Sep 27, 2006 page 654 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Serial/Timer Control Register (STCR)
2
C Control (IICS, IICX1, IICX0, IICE): When the on-chip IIC option is included,
(Mask ROM Version, H8S/2148 F-ZTAT, H8S/2147N F-ZTAT, H8S/2144 F-ZTAT, and H8S/2142 F-ZTAT)
Block (Size)
IICS
R/W
7
0
64-kbyte Versions
EB0 (1 kbyte)
EB1 (1 kbyte)
EB2 (1 kbyte)
EB3 (1 kbytes)
EB4 (28 kbytes)
EB5 (16 kbytes)
EB6 (8 kbytes)
EB7 (8 kbytes)
IICX1
R/W
6
0
2
IICX0
C bus interface. For details, see section 16, I
R/W
5
0
IICE
R/W
H'(00)1000 to H'(00)7FFF
H'(00)8000 to H'(00)BFFF
H'(00)C000 to H'(00)DFFF
H'00E000 to H'00FFFF
Address
H'(00)0000 to H'(00)03FF
H'(00)0400 to H'(00)07FF
H'(00)0800 to H'(00)0BFF
H'(00)0C00 to H'(00)0FFF
H'010000 to H'017FFF
H'018000 to H'01FFFF
4
0
FLSHE
R/W
3
0
R/W
2
0
ICKS1
R/W
1
0
2
C Bus
ICKS0
R/W
0
0

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