DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 410

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 12 8-Bit Timers
Timer Output Timing
When compare-match A or B occurs, the timer output changes as specified by the output select
bits (OS3 to OS0) in TCSR. Depending on these bits, the output can remain the same, be set to 0,
be set to 1, or toggle.
Figure 12.5 shows the timing when the output is set to toggle at compare-match A.
Timing of Compare-Match Clear
TCNT is cleared when compare-match A or B occurs, depending on the setting of the CCLR1 and
CCLR0 bits in TCR. Figure 12.6 shows the timing of this operation.
12.3.3
TCNT is cleared at the rising edge of an external reset input, depending on the settings of the
CCLR1 and CCLR0 bits in TCR. The width of the clearing pulse must be at least 1.5 states. Figure
12.7 shows the timing of this operation.
Rev. 4.00 Sep 27, 2006 page 364 of 1130
REJ09B0327-0400
Compare-match A
signal
Timer output
pin
Compare-match
signal
TCNT
TCNT External Reset Timing
Figure 12.6 Timing of Compare-Match Clear
Figure 12.5 Timing of Timer Output
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