DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 664

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 20 A/D Converter
Bit 7—A/D End Flag (ADF): Status flag that indicates the end of A/D conversion.
Bit 7
ADF
0
1
Bit 6—A/D Interrupt Enable (ADIE): Selects enabling or disabling of interrupt (ADI) requests
at the end of A/D conversion.
Bit 6
ADIE
0
1
Bit 5—A/D Start (ADST): Selects starting or stopping of A/D conversion. Holds a value of 1
during A/D conversion.
The ADST bit can be set to 1 by software, a timer conversion start trigger, or the A/D external
trigger input pin (ADTRG).
Bit 5
ADST
0
1
Bit 4—Scan Mode (SCAN): Selects single mode or scan mode as the A/D conversion operating
mode. See section 20.4, Operation, for single mode and scan mode operation. Only set the SCAN
bit while conversion is stopped.
Rev. 4.00 Sep 27, 2006 page 618 of 1130
REJ09B0327-0400
Description
[Clearing conditions]
[Setting conditions]
Description
A/D conversion end interrupt (ADI) request is disabled
A/D conversion end interrupt (ADI) request is enabled
Description
A/D conversion stopped
Single mode: A/D conversion is started. Cleared to 0 automatically when conversion
Scan mode:
When 0 is written in the ADF flag after reading ADF = 1
When the DTC is activated by an ADI interrupt and ADDR is read
Single mode: When A/D conversion ends
Scan mode:
on the specified channel ends
A/D conversion is started. Conversion continues sequentially on the
selected channels until ADST is cleared to 0 by software, a reset, or a
transition to standby mode or module stop mode
When A/D conversion ends on all specified channels
(Initial value)
(Initial value)
(Initial value)

Related parts for DF2148RTE20IV