DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 366

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 16-Bit Free-Running Timer
Bit 7
IEDGA
0
1
Bit 6—Input Edge Select B (IEDGB): Selects the rising or falling edge of the input capture B
signal (FTIB).
Bit 6
IEDGB
0
1
Bit 5—Input Edge Select C (IEDGC): Selects the rising or falling edge of the input capture C
signal (FTIC).
Bit 5
IEDGC
0
1
Bit 4—Input Edge Select D (IEDGD): Selects the rising or falling edge of the input capture D
signal (FTID).
Bit 4
IEDGD
0
1
Bit 3—Buffer Enable A (BUFEA): Selects whether ICRC is to be used as a buffer register for
ICRA.
Bit 3
BUFEA
0
1
Rev. 4.00 Sep 27, 2006 page 320 of 1130
REJ09B0327-0400
Description
Capture on the falling edge of FTIA
Capture on the rising edge of FTIA
Description
Capture on the falling edge of FTIB
Capture on the rising edge of FTIB
Description
Capture on the falling edge of FTIC
Capture on the rising edge of FTIC
Description
Capture on the falling edge of FTID
Capture on the rising edge of FTID
Description
ICRC is not used as a buffer register for input capture A
ICRC is used as a buffer register for input capture A
(Initial value)
(Initial value)
(Initial value)
(Initial value)
(Initial value)