DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 517

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
No
No
No
Figure 15.12 Sample Multiprocessor Serial Reception Flowchart
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data in RDR
Read receive data in RDR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit in SCR to 0
Read MPIE bit in SCR
FER
FER
All data received?
This station’s ID?
Start reception
Initialization
RDRF = 1?
RDRF = 1?
<End>
ORER = 1?
ORER = 1?
Yes
Yes
Yes
Yes
No
No
Section 15 Serial Communication Interface (SCI, IrDA)
Yes
No
Yes
[4]
[3]
[1]
[2]
Error handling
(Continued on
next page)
[5]
Rev. 4.00 Sep 27, 2006 page 471 of 1130
[1]
[2]
[3]
[4]
[5]
SCI initialization:
The RxD pin is automatically
designated as the receive data
input pin.
ID reception cycle:
Set the MPIE bit in SCR to 1.
SCI status check, ID reception
and comparison:
Read SSR and check that the
RDRF flag is set to 1, then read
the receive data in RDR and
compare it with this station’s ID.
If the data is not this station’s ID,
set the MPIE bit to 1 again, and
clear the RDRF flag to 0.
If the data is this station’s ID,
clear the RDRF flag to 0.
SCI status check and data
reception:
Read SSR and check that the
RDRF flag is set to 1, then read
the data in RDR.
Receive error handling and break
detection:
If a receive error occurs, read the
ORER and FER flags in SSR to
identify the error. After
performing the appropriate error
handling, ensure that the ORER
and FER flags are both cleared
to 0.
Reception cannot be resumed if
either of these flags is set to 1.
In the case of a framing error, a
break can be detected by reading
the RxD pin value.
REJ09B0327-0400

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