DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 206

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 6 Bus Controller
6.4
6.4.1
The basic bus interface enables direct connection of ROM, SRAM, and so on.
The bus specifications can be selected with the ABW bit, the AST bit, and the WMS1, WMS0,
WC1, and WC0 bits (see table 6.3).
6.4.2
Data sizes for the CPU and other internal bus masters are byte, word, and longword. The bus
controller has a data alignment function, and when accessing external space, controls whether the
upper data bus (D15 to D8) or lower data bus (D7 to D0) is used according to the bus
specifications for the area being accessed (8-bit access space or 16-bit access space) and the data
size.
8-Bit Access Space
Figure 6.3 illustrates data alignment control for the 8-bit access space. With the 8-bit access space,
the upper data bus (D15 to D8) is always used for accesses. The amount of data that can be
accessed at one time is one byte: a word access is performed as two byte accesses, and a longword
access, as four byte accesses.
Rev. 4.00 Sep 27, 2006 page 160 of 1130
REJ09B0327-0400
Byte size
Word size
Longword size
Basic Bus Interface
Overview
Data Size and Data Alignment
Figure 6.3 Access Sizes and Data Alignment Control (8-Bit Access Space)
1st bus cycle
2nd bus cycle
1st bus cycle
2nd bus cycle
3rd bus cycle
4th bus cycle
D15
Upper data bus
D8 D7
Lower data bus
D0

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