DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 560

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 16 I
Bit 3—Arbitration Lost (AL): This flag indicates that arbitration was lost in master mode. The
I
nearly the same time, if the I
to 1 to indicate that the bus has been taken by another master.
AL is cleared by reading AL after it has been set to 1, then writing 0 in AL. In addition, AL is
reset automatically by write access to ICDR in transmit mode, or read access to ICDR in receive
mode.
Bit 3
AL
0
1
Bit 2—Slave Address Recognition Flag (AAS): In I
set to 1 if the first frame following a start condition matches bits SVA6 to SVA0 in SAR, or if the
general call address (H'00) is detected.
AAS is cleared by reading AAS after it has been set to 1, then writing 0 in AAS. In addition, AAS
is reset automatically by write access to ICDR in transmit mode, or read access to ICDR in receive
mode.
Rev. 4.00 Sep 27, 2006 page 514 of 1130
REJ09B0327-0400
2
C bus interface monitors the bus. When two or more master devices attempt to seize the bus at
Description
Bus arbitration won
[Clearing conditions]
1. When ICDR data is written (transmit mode) or read (receive mode)
2. When 0 is written in AL after reading AL = 1
Arbitration lost
[Setting conditions]
1. If the internal SDA and SDA pin disagree at the rise of SCL in master transmit
2. If the internal SCL line is high at the fall of SCL in master transmit mode
2
C Bus Interface [Option]
mode
2
C bus interface detects data differing from the data it sent, it sets AL
2
C bus format slave receive mode, this flag is
(Initial value)

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