DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 626

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 17 Keyboard Buffer Controller
17.3.8
In this device, clearing the KBFSEL bit to 0 in KBCRH enables the KBF bit in KBCRL to be used
as a flag for the interrupt generated by the fall of KCLK input.
Figure 17.13 shows the setting method and an example of operation.
Rev. 4.00 Sep 27, 2006 page 580 of 1130
REJ09B0327-0400
Note: The KBF setting timing is the same as the timing of KBF setting and KCLK automatic I/O inhibit bit
(interrupt generated)
generation in figure 17.11. When the KBF bit is used as the KCLK input fall interrupt flag, the
automatic I/O inhibit function does not operate.
interrupts enabled)
(KCLK falling edge
Interrupt handling
KCLK Fall Interrupt Operation
(KBBR reception
fall detected?
KBFSEL = 0
Set KBIOE
Clear KBF
KCLK pin
disabled)
KBIE = 1
KBE = 0
KBF = 1
Figure 17.13 Example of KCLK Input Fall Interrupt Operation
Start
Yes
No
KCLK
(pin state)
KBF bit
Interrupt
generated
Cleared
by software
Interrupt
generated

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