DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 786

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Section 24 Clock Pulse Generator
t
t
EXCLH
EXCLL
V
0.5
EXCL
CC
t
t
EXCLr
EXCLf
Figure 24.8 Subclock Input Timing
When Subclock Is Not Needed
Do not enable subclock input when the subclock is not needed
Note on Subclock Usage
In transiting to power-down mode, if at least two cycles of the 32-kHz clock are not input after the
32-kHz clock input is enabled (EXCLE = 1) until the SLEEP instruction is executed (power-down
mode transition), the subclock input circuit is not initialized and an error may occur in the
microcomputer.
Before power-down mode is entered with using the subclock, at least two cycle of the 32-kHz
clock should be input after the 32-kHz clock input is enabled (EXCLE = 1).
As described in the hardware manual (clock pulse generator/subclock input circuit), when the
subclock is not used, the subclock input should not be enabled (EXCLE = 0).
24.8
Subclock Waveform Shaping Circuit
To eliminate noise in the subclock input from the EXCL pin, this circuit samples the clock using a
clock obtained by dividing the clock. The sampling frequency is set with the NESEL bit in
LPWRCR. For details, see sections 24.2.2 and 25.2.2, Low-Power Control Register (LPWRCR).
The clock is not sampled in subactive mode, subsleep mode, or watch mode.
Rev. 4.00 Sep 27, 2006 page 740 of 1130
REJ09B0327-0400

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