DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 566

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 I
Bit 3
CLR3
0
1
16.2.9
MSTPCR comprises two 8-bit readable/writable registers, and is used to perform module stop
mode control.
When the MSTP4 or MSTP3 bit is set to 1, operation of the corresponding IIC channel is halted at
the end of the bus cycle, and a transition is made to module stop mode. For details, see section
25.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
MSTPCRL Bit 4—Module Stop (MSTP4): Specifies IIC channel 0 module stop mode.
MSTPCRL
Bit 4
MSTP4
0
1
Rev. 4.00 Sep 27, 2006 page 520 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Module Stop Control Register (MSTPCR)
Bit 2
CLR2
0
1
—
Description
IIC channel 0 module stop mode is cleared
IIC channel 0 module stop mode is set
2
C Bus Interface [Option]
MSTP15
R/W
7
0
MSTP14
R/W
6
0
Bit 1
CLR1
—
0
1
—
MSTP13
R/W
5
1
MSTPCRH
MSTP12
R/W
4
1
MSTP11
R/W
3
1
Bit 0
CLR0
—
0
1
0
1
—
MSTP10
R/W
2
1
MSTP9
R/W
1
1
Description
Setting prohibited
Setting prohibited
IIC0 internal latch cleared
IIC1 internal latch cleared
IIC0 and IIC1 internal latches cleared
Invalid setting
MSTP8
R/W
0
1
MSTP7
R/W
7
1
MSTP6
R/W
6
1
MSTP5
R/W
5
1
MSTPCRL
MSTP4
R/W
4
1
MSTP3
R/W
3
1
MSTP2
R/W
2
1
(Initial value)
MSTP1
R/W
1
1
MSTP0
R/W
0
1