DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 136

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 3 MCU Operating Modes
3.3.3
The CPU can access a 64-kbyte address space in normal mode. The on-chip ROM is enabled.
After a reset, single-chip mode is set, and the EXPE bit in MDCR must be set to 1 in order to use
external addresses.
When the EXPE bit in MDCR is set to 1, ports 1 and 2 function as input ports after a reset. They
can be set to output addresses by setting the corresponding bits in the data direction register
(DDR) to 1. Port 3 functions as a data bus, and part of port 9 carries bus control signals. Clearing
the ABW bit to 0 in the WSCR register makes port B a data bus.
In this operating mode, the available amount of on-chip ROM in products with 64 kbytes or more
of ROM is limited to 56 kbytes.
3.4
The pin functions of ports 1 to 3, 9, A, and B vary depending on the operating mode. Table 3.3
shows their functions in each operating mode.
Table 3.3
Port
Port 1
Port 2
Port A
Port 3
Port B
Port 9
Legend:
P: I/O port
A: Address bus output
D: Data bus I/O
C: Control signals, clock I/O
*: After reset
Rev. 4.00 Sep 27, 2006 page 90 of 1130
REJ09B0327-0400
Mode 3
Pin Functions in Each Operating Mode
P97
P96
P95 to P93
P92 to P91
P90
Pin Functions in Each Mode
Mode 1
A
A
P
D
P * /D
P * /C
C * /P
C
P
P * /C
Mode 2
P * /A
P * /A
P * /A
P * /D
P * /D
P * /C
P * /C
P * /C
P
P * /C
Mode 3
P * /A
P * /A
P
P * /D
P * /D
P * /C
P * /C
P * /C
P
P * /C