DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 449

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
13.3.7
With the HSYNCO output, the meaning of the signal source to be selected and use or non-use of
modification varies according to the IHI signal source and the waveform required by external
circuitry. The meaning of the HSYNCO output in each mode is shown in table 13.9.
Table 13.9 Meaning of HSYNCO Output in Each Mode
Mode
No signal
S-on-G
mode
Composite
mode
Separate
mode
HSYNCO Output
IHI Signal
HFBACKI
input
CSYNCI
input
HSYNCI
input
HSYNCI
input
IHI signal (without
2fH modification)
IHI signal (with 2fH
modification)
CL1 signal
IHG signal
IHI signal (without
2fH modification)
IHI signal (with 2fH
modification)
CL1 signal
IHG signal
IHI signal (without
2fH modification)
IHI signal (with 2fH
modification)
CL1 signal
IHG signal
IHI signal (without
2fH modification)
IHI signal (with 2fH
modification)
CL1 signal
IHG signal
IHO Signal
HFBACKI input is output directly
Meaningless unless there is a double-frequency
part in the HFBACKI input
HFBACKI input 1 interval is changed before output
Internal synchronization signal is output
CSYNCI input (composite synchronization signal)
is output directly
Double-frequency part of CSYNCI input (composite
synchronization signal) is eliminated before output
CSYNCI input (composite synchronization signal)
horizontal synchronization signal part is separated
before output
Internal synchronization signal is output
HSYNCI input (composite synchronization signal)
is output directly
Double-frequency part of HSYNCI input (composite
synchronization signal) is eliminated before output
HSYNCI input (composite synchronization signal)
horizontal synchronization signal part is separated
before output
Internal synchronization signal is output
HSYNCI input (horizontal synchronization signal) is
output directly
Meaningless unless there is a double-frequency
part in the HSYNCI input (horizontal
synchronization signal)
HSYNCI input (horizontal synchronization signal) 1
interval is changed before output
Internal synchronization signal is output
Meaning of IHO Signal
Rev. 4.00 Sep 27, 2006 page 403 of 1130
Section 13 Timer Connection
REJ09B0327-0400

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