DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 583

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Figure 16.14 Flowchart for Master Transmit Mode (Example)
No
No
No
No
No
Write transmit data in ICDR
Write transmit data in ICDR
and SCP = 0 in ICCR
and SCP = 0 in ICCR
Read BBSY in ICCR
Read ACKB in ICSR
Read ACKB in ICSR
End of transmission
Read IRIC in ICCR
Read IRIC in ICCR
Read IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Clear IRIC in ICCR
Set MST = 1 and
TRS = 1 in ICCR
Transmit mode?
Write BBSY = 1
Write BBSY = 0
or ACKB = 1?
BBSY = 0?
ACKB = 0?
Yes
IRIC = 1?
IRIC = 1?
IRIC = 1?
Initialize
Start
End
Yes
Yes
Yes
Yes
Yes
Yes
No
No
Master receive mode
[1] Initialize
[2] Test the status of the SCL and SDA lines.
[3] Select master transmit mode.
[4] Start condition issuance
[5] Wait for a start condition generation
[6] Set transmit data for the first byte (slave
[7] Wait for 1 byte to be transmitted.
[8] Test the acknowledge bit, transferred from
[9] Set transmit data for the second and
[10] Wait for 1 byte to be transmitted.
[11] Test for end of transfer
[12] Stop condition issuance
address + R/W).
(After writing ICDR, clear IRIC
immediately)
slave device.
subsequent bytes.
(After writing ICDR, clear IRIC
immediately)
Rev. 4.00 Sep 27, 2006 page 537 of 1130
Section 16 I
2
C Bus Interface [Option]
REJ09B0327-0400

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