DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 564

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 16 I
16.2.8
DDCSWR is an 8-bit readable/writable register that is used to initialize IIC and controls IIC
internal latch clearance.
DDCSWR is initialized to H'0F by a reset and in hardware standby mode.
Bit 7—DDC Mode Switch Enable (SWE): Selects the function for automatically switching IIC
channel 0 from formatless mode to the I
Bit 7
SWE
0
1
Bit 6—DDC Mode Switch (SW): Selects either formatless mode or the I
channel 0.
Bit 6
SW
0
1
Rev. 4.00 Sep 27, 2006 page 518 of 1130
REJ09B0327-0400
Bit
Initial value
Read/Write
Notes: 1. Only 0 can be written, to clear the flag.
DDC Switch Register (DDCSWR)
2. Always read as 1.
Description
Automatic switching of IIC channel 0 from formatless mode to I
disabled
Automatic switching of IIC channel 0 from formatless mode to I
enabled
Description
IIC channel 0 is used with the I
[Clearing conditions]
1. When 0 is written by software
2. When a falling edge is detected on the SCL pin when SWE = 1
IIC channel 0 is used in formatless mode
[Setting condition]
When 1 is written in SW after reading SW = 0
2
C Bus Interface [Option]
SWE
R/W
7
0
R/W
SW
6
0
R/W
2
C bus format.
IE
5
0
2
C bus format
R/(W) *
IF
4
0
1
CLR3
W *
3
1
2
CLR2
W *
2
1
2
2
C bus format for IIC
2
2
C bus format is
C bus format is
CLR1
W *
1
1
2
(Initial value)
(Initial value)
CLR0
W *
0
1
2