DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 615

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Receive data processing
(receive enabled state)
Receive enabled state
and KDI bits both
Clear KBF flag
Set KBIOE bit
Read KBCRH
Read KBBR
Set KBE bit
KBF = 1?
PER = 0?
KBS = 1?
KCLKI
Start
1?
Yes
Yes
Yes
Yes
Figure 17.3 Sample Receive Processing Flowchart
[1]
[2]
No
[3]
No
No
No
[6]
Keyboard side in data
Execute receive abort
Error handling
transmission state.
[4]
processing.
[5]
Rev. 4.00 Sep 27, 2006 page 569 of 1130
Section 17 Keyboard Buffer Controller
[1] Set the KBIOE bit to 1 in
[2] Read KBCRH, and if the
[3] Detect the start bit output
[4] When a stop bit is received,
[5] Perform receive data
[6] Clear the KBF flag to 0 in
The receive operation can be
continued by repeating steps
[3] to [6].
KBCRL.
KCLKI and KDI bits are
both 1, set the KBE bit
(receive enabled state).
on the keyboard side and
receive data in
synchronization with the fall
of KCLK.
the keyboard buffer
controller drives KCLK low
to disable keyboard
transmission (automatic I/O
inhibit).
If the KBIE bit is set to 1 in
KBCRH, an interrupt
request is sent to the CPU
at the same time.
processing.
KBCRL. At the same time,
the system automatically
drives KCLK high, setting
the receive enabled state.
REJ09B0327-0400

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