DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 1172

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Appendix E Timing of Transition to and Recovery from Hardware Standby Mode
E.1
(1) To retain RAM contents with the RAME bit set to 1 in SYSCR, drive the RES signal low 10
(2) To retain RAM contents with the RAME bit cleared to 0 in SYSCR, or when RAM contents do
E.2
Drive the RES signal low at least 100 ns before STBY goes high to execute a reset.
Rev. 4.00 Sep 27, 2006 page 1126 of 1130
REJ09B0327-0400
Appendix E Timing of Transition to and Recovery from
system clock cycles before the STBY signal goes low, as shown in figure E.1. RES must
remain low until STBY signal goes low (minimum delay from STBY low to RES high: 0 ns).
not need to be retained, RES does not have to be driven low as in (1).
STBY
RES
STBY
RES
Timing of Transition to Hardware Standby Mode
Timing of Recovery from Hardware Standby Mode
Figure E.2 Timing of Recovery from Hardware Standby Mode
Figure E.1 Timing of Transition to Hardware Standby Mode
Hardware Standby Mode
t
t
1
100 ns
10 t
cyc
t
2
t
OSC1
0 ns

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