DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 800

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 25 Power-Down State
25.4
25.4.1
If a SLEEP instruction is executed when the SSBY bit in SBYCR and the LSON bit in LPWRCR
are both cleared to 0, the CPU enters sleep mode. In sleep mode, CPU operation stops but the
contents of the CPU’s internal registers are retained. Other supporting modules do not stop.
25.4.2
Sleep mode is cleared by any interrupt, or with the RES pin or STBY pin.
Clearing with an Interrupt: When an interrupt request signal is input, sleep mode is cleared and
interrupt exception handling is started. Sleep mode will not be cleared if interrupts are disabled, or
if interrupts other than NMI have been masked by the CPU.
Clearing with the RES
RES pin is driven high after the prescribed reset input period, the CPU begins reset exception
handling.
Clearing with the STBY
standby mode.
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REJ09B0327-0400
supporting module
clock
Bus master clock
Internal address
bus
Internal write signal
,
Sleep Mode
Sleep Mode
Clearing Sleep Mode
Figure 25.2 Medium-Speed Mode Transition and Clearance Timing
RES Pin: When the RES pin is driven low, the reset state is entered. When the
RES
RES
STBY
STBY
STBY Pin: When the STBY pin is driven low, a transition is made to hardware
SBYCR
Medium-speed mode
SBYCR