DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 982

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Appendix A Instruction Set
Rev. 4.00 Sep 27, 2006 page 936 of 1130
REJ09B0327-0400
BTST
BLD
BILD
BST
BIST
BTST #xx:3,Rd
BTST #xx:3,@ERd
BTST #xx:3,@aa:8
BTST #xx:3,@aa:16
BTST #xx:3,@aa:32
BTST Rn,Rd
BTST Rn,@ERd
BTST Rn,@aa:8
BTST Rn,@aa:16
BTST Rn,@aa:32
BLD #xx:3,Rd
BLD #xx:3,@ERd
BLD #xx:3,@aa:8
BLD #xx:3,@aa:16
BLD #xx:3,@aa:32
BILD #xx:3,Rd
BILD #xx:3,@ERd
BILD #xx:3,@aa:8
BILD #xx:3,@aa:16
BILD #xx:3,@aa:32
BST #xx:3,Rd
BST #xx:3,@ERd
BST #xx:3,@aa:8
BST #xx:3,@aa:16
BST #xx:3,@aa:32
BIST #xx:3,Rd
BIST #xx:3,@ERd
BIST #xx:3,@aa:8
BIST #xx:3,@aa:16
BIST #xx:3,@aa:32
Mnemonic
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
Instruction Length (Bytes)
Addressing Mode and
2
2
2
2
2
2
4
4
4
4
4
4
4
6
8
4
6
8
4
6
8
4
6
8
4
6
8
4
6
8
¬ (#xx:3 of Rd8) Z
¬ (#xx:3 of @ERd) Z
¬ (#xx:3 of @aa:8) Z
¬ (#xx:3 of @aa:16) Z
¬ (#xx:3 of @aa:32) Z
¬ (Rn8 of Rd8) Z
¬ (Rn8 of @ERd) Z
¬ (Rn8 of @aa:8) Z
¬ (Rn8 of @aa:16) Z
¬ (Rn8 of @aa:32) Z
(#xx:3 of Rd8) C
(#xx:3 of @ERd) C
(#xx:3 of @aa:8) C
(#xx:3 of @aa:16) C
(#xx:3 of @aa:32) C
¬ (#xx:3 of Rd8) C
¬ (#xx:3 of @ERd) C
¬ (#xx:3 of @aa:8) C
¬ (#xx:3 of @aa:16) C
¬ (#xx:3 of @aa:32) C
C (#xx:3 of Rd8)
C (#xx:3 of @ERd)
C (#xx:3 of @aa:8)
C (#xx:3 of @aa:16)
C (#xx:3 of @aa:32)
¬ C (#xx:3 of Rd8)
¬ C (#xx:3 of @ERd)
¬ C (#xx:3 of @aa:8)
¬ C (#xx:3 of @aa:16)
¬ C (#xx:3 of @aa:32)
Operation
I
Condition Code
H N Z V C
States *
No. of
1
3
3
4
5
1
3
3
4
5
1
3
3
4
5
1
3
3
4
5
1
4
4
5
6
1
4
4
5
6
1

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