DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 988

• Manufacturer Part Number: DF2148RTE20IV
• Description: MCU 5V 128K I-TEMP,PB-FREE, 100-
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2148RTE20IV

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: Host Interface, I²C, IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Appendix A Instruction Set
8. Block Transfer Instructions
Notes: 1. The number of states is the number of states required for execution when the
Rev. 4.00 Sep 27, 2006 page 942 of 1130
REJ09B0327-0400
EEPMOV EEPMOV.B
EEPMOV.W
2. n is the initial value set in R4L or R4.
3. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
4. Only registers ER0 to ER6 should be used when using the STM/LDM instruction.
[1] 7 states when the number of saved/restored registers is 2, 9 states when 3, and 11
[2] Cannot be used with this LSI.
[3] Set to 1 when there is a carry from or borrow to bit 11; otherwise cleared to 0.
[4] Set to 1 when there is a carry from or borrow to bit 27; otherwise cleared to 0.
[5] If the result is zero, the previous value of the flag is retained; otherwise the flag is
[6] Set to 1 if the divisor is negative; otherwise cleared to 0.
[7] Set to 1 if the divisor is zero; otherwise cleared to 0.
[8] Set to 1 if the quotient is negative; otherwise cleared to 0.
[9] When EXR is valid, the number of states is increased by 1.
Mnemonic
instruction and its operands are located in on-chip memory.
states when 4.
cleared to 0.
—
—
Instruction Length (Bytes)
Addressing Mode and
4
4
if R4L 0
else next;
if R4 0
else next;
Until R4L=0
Until R4=0
Repeat @ER5 @ER6
Repeat @ER5 @ER6
ER5+1 ER5
ER6+1 ER6
R4L-1 R4L
ER5+1 ER5
ER6+1 ER6
R4-1 R4
Operation
—
—
I
Condition Code
—
—
H N Z V C
—
—
—
—
—
—
—
—
States *
4+2n *
4+2n *
No. of
2
2
1