DF2148RTE20IV Renesas Electronics America, DF2148RTE20IV Datasheet - Page 1056

MCU 5V 128K I-TEMP,PB-FREE, 100-

DF2148RTE20IV

Manufacturer Part Number
DF2148RTE20IV
Description
MCU 5V 128K I-TEMP,PB-FREE, 100-
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2148RTE20IV

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
Host Interface, I²C, IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Appendix B Internal I/O Registers
KBCRH0—Keyboard Control Register H0
KBCRH1—Keyboard Control Register H1
KBCRH2—Keyboard Control Register H2
Rev. 4.00 Sep 27, 2006 page 1010 of 1130
REJ09B0327-0400
Note: * Only 0 can be written, to clear the flag.
Bit
Initial value
Read/Write
KBIOE
R/W
Keyboard in/out enable
7
0
0 The keyboard buffer controller is non-operational (KCLK and KD signal pins
1 The keyboard buffer controller is enabled for transmission and reception
have port functions)
(KCLK and KD signal pins are in the bus drive state)
KCLKI
Keyboard clock in
0 KCLK I/O pin is low
1 KCLK I/O pin is high
R
6
1
KDI
Keyboard data in
5
R
0 KD I/O pin is low
1 KD I/O pin is high
1
Keyboard buffer register full select
0 KBF bit is used as KCLK fall interrupt flag
1 KBF bit is used as keyboard buffer full flag
KBFSEL
R/W
Keyboard interrupt enable
0 Interrupt requests are disabled
1 Interrupt requests are enabled
4
1
H'FED8
H'FEDC
H'FEE0
Keyboard buffer register full
0 [Clearing condition]
1
Read KBF when KBF =1, then write 0 in KBF
[Setting conditions]
• When data has been received normally while
• When a KCLK falling edge has been detected
KBIE
KBFSEL = 1, and has been transferred to
KBBR (keyboard buffer register full flag)
while KBFSEL = 0 (KCLK interrupt flag)
R/W
3
0
Parity error
0 [Clearing condition]
1 [Setting condition]
R/(W) *
Keyboard Buffer Controller
Keyboard Buffer Controller
Keyboard Buffer Controller
KBF
Read PER when PER =1,
then write 0 in PER
When an odd parity error occurs
2
0
Keyboard stop
0 0 stop bit received
1 1 stop bit received
R/(W) *
PER
1
0
KBS
R
0
0

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