MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 168

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Central Processing Unit
In general, when an exception occurs, SRR1[0:15] are loaded with exception-specific information, and
MSR[16:31] are placed into SRR1[16:31].
3.9.8
SPRG0–SPRG3, SPRs 272-275, are provided for general operating system use, such as fast-state saves
and multiprocessor-implementation support. SPRG0–SPRG3 are shown below.
Uses for SPRG0–SPRG3 are shown in
3-24
Register
SPRG0
SPRG1
SPRG2
SPRG3
Reset
Reset
Field
Addr
MSB
General SPRs (SPRG0–SPRG3)
MSB
0
0
Software may load a unique physical address in this register to identify an area of memory reserved for use
by the exception handler. This area must be unique for each processor in the system.
This register may be used as a scratch register by the exception handler to save the content of a GPR. That
GPR then can be loaded from SPRG0 and used as a base register to save other GPRs to memory.
This register may be used by the operating system as needed.
This register may be used by the operating system as needed.
1
1
Figure 3-16. SPRG0–SPRG3 — General Special-Purpose Registers 0–3
2
2 3
3
Figure 3-15. Machine Status Save/Restore Register 1 (SRR1)
4
4 5
5
6
6 7
7 8
MPC561/MPC563 Reference Manual, Rev. 1.2
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Table 3-13. Uses of SPRG0–SPRG3
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
Table
3-13.
Unchanged
Description
Undefined
SPR 27
SPRG0
SPRG1
SPRG2
SPRG3
SRR1
Freescale Semiconductor
LSB
LSB
31
31

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