MPC562MZP56 Freescale Semiconductor, MPC562MZP56 Datasheet - Page 770

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC562MZP56

Manufacturer Part Number
MPC562MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC562MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Modular Input/Output Subsystem (MIOS14)
where:
A few examples of frequencies and resolutions that can be obtained are shown in
When using 16 bits of resolution on the comparator (MODE[2:0] = 0b000), the output can vary from a 0%
duty cycle up to a duty cycle of 65535/65536. In this case it is not possible to have a 100% duty cycle. In
cases where 16-bit resolution is not needed, it is possible to have a duty cycle ranging from 0% to 100%.
Setting bit 15 of the value stored in register B to one results in the output being ‘always set’. Clearing bit
15 (to zero) allows normal comparisons to occur and the normal output waveform is obtained. Changes to
and from the 100% duty cycle are done synchronously on an A or B match, as are all other width changes.
17-38
N
N
the 16-bit counter bus.
N
count is equal to 2
1
MCPSM
COUNTER
MDASM
Table 17-17. MDASM PWM Example Output Frequencies/Resolutions at f
This information is valid only if the MDASM is connected to an MMCSM operating as a free-running
counter.
Resolution
(bits)
16
16
15
15
14
14
13
13
12
12
11
11
9
9
7
7
is the overall MCPSM clock divide ratio (2, 3, 4,...,16).
is the maximum count reachable by the counter when using n bits of resolution (this
is the divide ratio of the prescaler of the counter (used as a time reference) that drives
n
).
N
f
MCPSM
PWM
16
16
16
16
16
16
16
16
2
2
2
2
2
2
2
2
MPC561/MPC563 Reference Manual, Rev. 1.2
=
N
N
COUNTER
MCPSM
256
256
256
256
256
256
256
256
1
1
1
1
1
1
1
1
• N
COUNTER
f
SYS
N
65536
65536
32768
32768
16384
16384
MDASM
8192
8192
4096
4096
2048
2048
512
512
128
128
• N
MDASM
PWM output frequency (Hz)
39 062.50
1 220.70
2 441.41
4 882.81
9 765.63
156 250
305.17
610.35
19.07
76.29
0.15
0.29
0.59
1.19
2.38
4.77
Table
SYS
Freescale Semiconductor
= 40 MHz
17-17.
1

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