mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 114

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 3 2 Kbyte EEPROM Module (EETS2KV1)
3.5.3
In background debug mode (BDM), the EPROT register is writable. If the chip is unsecured then all
EEPROM commands listed in
mode, then the only possible command to execute is mass erase.
3.6
If a reset occurs while any EEPROM command is in progress, that command will be immediately aborted.
The state of the word being programmed or the sector / block being erased is not guaranteed.
3.7
The EEPROM module can generate an interrupt when all EEPROM commands are completed or the
address, data, and command buffers are empty.
For a detailed description of the register bits, refer to
(ECNFG)”
114
EEPROM address, data and
command buffers empty
All commands are completed
on EEPROM
Resets
Interrupts
and
Background Debug Mode
Interrupt Source
Vector addresses and their relative interrupt priority are determined at the
MCU level.
Section 3.3.2.6, “EEPROM Status Register
Table 3-10
Table 3-11. EEPROM Interrupt Sources
MC9S12HZ256 Data Sheet, Rev. 2.05
can be executed. If the chip is secured in special single-chip
(ESTAT register)
(ESTAT register)
Interrupt Flag
CBEIF
CCIF
NOTE
Section 3.3.2.4, “EEPROM Configuration Register
(ESTAT)”.
Local Enable
CBEIE
CCIE
Global (CCR) Mask
Freescale Semiconductor
I Bit
I Bit