mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 488
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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Chapter 16 Timer Module (TIM16B8CV1)
16.3.2.9
Read: Anytime
Write: Anytime.
488
EDGnB
EDGnA
Reset
Reset
Field
7:0
W
W
R
R
EDG7B
EDG3B
Input Capture Edge Control — These eight pairs of control bits configure the input capture edge detector
circuits.
Timer Control Register 3/Timer Control Register 4 (TCTL3 and TCTL4)
0
0
7
7
EDG7A
EDG3A
0
0
6
6
EDGnB
Table 16-11. Edge Detector Circuit Configuration
Figure 16-16. Timer Control Register 3 (TCTL3)
Figure 16-17. Timer Control Register 4 (TCTL4)
0
0
1
1
Table 16-10. TCTL3/TCTL4 Field Descriptions
EDG6B
EDG2B
MC9S12HZ256 Data Sheet, Rev. 2.05
EDGnA
0
0
5
5
0
1
0
1
EDG6A
EDG2A
Capture on any edge (rising or falling)
0
0
4
4
Capture on falling edges only
Capture on rising edges only
Description
Capture disabled
Configuration
EDG5B
EDG1B
0
0
3
3
EDG5A
EDG1A
0
0
2
2
EDG4B
EDG0B
Freescale Semiconductor
0
0
1
1
EDG4A
EDG0A
0
0
0
0
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