mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 420
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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Chapter 14 Serial Peripheral Interface (SPIV3)
14.1.3
Figure 14-1
data registers, shifter logic, baud rate generator, master/slave control logic, and port control logic.
14.2
This section lists the name and description of all ports including inputs and outputs that do, or may, connect
off chip. The SPI module has a total of four external pins.
14.2.1
This pin is used to transmit data out of the SPI module when it is configured as a master and receive data
when it is configured as slave.
420
Bus Clock
Interrupt
Request
SPI
External Signal Description
Block Diagram
MOSI — Master Out/Slave In Pin
gives an overview on the SPI architecture. The main parts of the SPI are status, control, and
SPPR
SPI
SPI Baud Rate Register
Prescaler
SPI Control Register 1
SPI Control Register 2
Baud Rate Generator
SPI Status Register
SPI Data Register
Interrupt Control
SPIF
3
SPR
Clock Select
MODF
Counter
3
SPTEF
MC9S12HZ256 Data Sheet, Rev. 2.05
Figure 14-1. SPI Block Diagram
Baud Rate
LSBFE=1
LSBFE=0
8
8
Control
Control
Master
Slave
Master Baud Rate
Slave Baud Rate
MSB
2
2
Shifter
LSBFE=1
LSBFE=0
LSBFE=0
LSBFE=1
CPOL
Clock
Shift
Phase +
Polarity
Control
Phase +
Polarity
Control
LSB
CPHA
Sample
Clock
BIDIROE
SPC0
data out
SCK in
SCK out
data in
Control
Logic
Freescale Semiconductor
Port
MOSI
SCK
SS
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