mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 267

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
9.3.2.3
The period register defines PER, the number of motor controller timer counter clocks a PWM period lasts.
The motor controller timer counter is clocked with the frequency f
refer to
PER = 2 * D[10:1].
For example, programming MCPER to 0x0022 (PER = 34 decimal) will result in 34 counts for each
complete PWM period. Setting MCPER to 0 will shut off all PWM channels as if MCAM[1:0] is set to 0
in all channel control registers after the next period timer counter overflow. In this case, the motor
controller releases all pins.
Freescale Semiconductor
Reset
Reset
W
W
R
R
Section 9.4.1.3.5, “Dither Bit
15
15
0
0
0
0
Motor Controller Period Register
= Unimplemented or Reserved
= Unimplemented or Reserved
Programming MCPER to 0x0001 and setting the DITH bit will be managed
as if MCPER is programmed to 0x0000. All PWM channels will be shut off
after the next period timer counter overflow.
14
14
0
0
0
0
Figure 9-5. Motor Controller Period Register (MCPER) with DITH = 0
Figure 9-6. Motor Controller Period Register (MCPER) with DITH = 1
13
13
0
0
0
0
12
12
0
0
0
0
11
11
0
0
0
0
MC9S12HZ256 Data Sheet, Rev. 2.05
(DITH)”), P0 is ignored and reads as a 0. In this case
P10
P10
10
10
0
0
P9
P9
9
0
9
0
NOTE
P8
P8
8
0
8
0
P7
P7
7
0
7
0
P6
P6
TC
6
0
6
0
. If dither mode is enabled (DITH = 1,
P5
P5
5
0
5
0
Chapter 9 Motor Controller (MC10B8CV1)
P4
P4
4
0
4
0
P3
P3
3
0
3
0
P2
P2
2
0
2
0
P1
P1
1
0
1
0
P0
0
0
0
0
0
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