mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 466

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 15 Pulse-Width Modulator (PWM8B6CV1)
15.4.1.3
Each PWM channel has the capability of selecting one of two clocks. For channels 0, 1, 4, and 5 the clock
choices are clock A or clock SA. For channels 2 and 3 the choices are clock B or clock SB. The clock
selection is done with the PCLKx control bits in the PWMCLK register.
15.4.2
The main part of the PWM module are the actual timers. Each of the timer channels has a counter, a period
register and a duty register (each are 8 bit). The waveform output period is controlled by a match between
the period register and the value in the counter. The duty is controlled by a match between the duty register
and the counter value and causes the state of the output to change during the period. The starting polarity
of the output is also selectable on a per channel basis.
466
Clock Source
PWMEx
(clock edge sync)
PWM Channel Timers
Clock Select
GATE
Changing clock control bits while channels are operating can cause
irregularities in the PWM outputs.
up/down
reset
Figure 15-35. PWM Timer Channel Block Diagram
8-Bit Counter
PWMCNTx
Q
Q
T
R
MC9S12HZ256 Data Sheet, Rev. 2.05
NOTE
Figure 15-35
8-Bit Compare =
8-Bit Compare =
PWMDTYx
PWMPERx
CAEx
shows a block diagram for PWM timer.
T
R
Q
Q
PPOLx
M
U
X
From Port PWMP
Data Register
Freescale Semiconductor
M
U
X
To Pin
Driver

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