mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 134

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

CAN0/CAN1:
Chapter 4 Port Integration Module (PIM9HZ256V2)
4.3.3
Port M is associated with Freescale’s scalable controller area network (CAN1 and CAN0) modules. Each
pin is assigned to these modules according to the following priority: CAN1/CAN0 > general-purpose I/O.
When the CAN1 module is enabled, PM[5:4] pins become TXCAN1 (transmitter) and RXCAN1
(receiver) pins for the CAN1 module. When the CAN0 module is enabled, PM[3:2] pins become TXCAN0
(transmitter) and RXCAN0 (receiver) pins for the CAN0 module. Refer to the MSCAN block description
chapter for information on enabling and disabling the CAN module.
During reset, port M pins are configured as high-impedance inputs.
4.3.3.1
Read: Anytime. Write: Anytime.
If the associated data direction bit (DDRMx) is set to 1 (output), a read returns the value of the I/O register
bit. If the associated data direction bit (DDRMx) is set to 0 (input), a read returns the value of the pin.
4.3.3.2
Read: Anytime. Write: Never, writes to this register have no effect.
This register always reads back the status of the associated pins.
134
Reset
Reset
W
R
W
R
Port M
Port M I/O Register (PTM)
Port M Input Register (PTIM)
0
0
7
0
0
7
= Reserved or Unimplemented
= Reserved or Unimplemented
0
0
6
0
0
6
Figure 4-17. Port M Input Register (PTIM)
Figure 4-16. Port M I/O Register (PTM)
PTIM5
MC9S12HZ256 Data Sheet, Rev. 2.05
TXCAN1
u
5
PTM5
0
5
PTIM4
RXCAN1
PTM4
u
4
0
4
u = Unaffected by reset
PTIM3
TXCAN0
PTM3
u
3
0
3
PTIM2
RXCAN0
PTM2
u
2
0
2
Freescale Semiconductor
0
0
1
0
0
1
0
0
0
0
0
0