mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 641

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

A.5
This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and
Phase-Locked-Loop (PLL).
A.5.1
Table A-15
startup behavior can be found in the Clock and Reset Generator (CRG) Block User Guide.
A.5.1.1
The release level V
if the device is powered externally. After releasing the POR reset the oscillator and the clock quality check
are started. If after a time t
clock. The fastest startup time possible is given by n
A.5.1.2
Provided an appropriate external reset signal is applied to the MCU, preventing the CPU from executing
code when VDD5 is out of specification limits, the SRAM contents integrity is guaranteed if after the reset
the PORF bit in the CRG Flags Register has not been set.
Freescale Semiconductor
Conditions are shown in
Num C
1
2
3
4
5
6
Num
1
3
D Reset input pulse width, minimum input time
D Startup from Reset
D Interrupt pulse width, IRQ edge-sensitive mode
D Wait recovery startup time
T POR release level
T POR assert level
Reset, Oscillator and PLL
VDD external capacitive load
VDDPLL external capacitive load
summarizes several startup characteristics explained in this section. Detailed description of the
Startup
POR
SRAM Data Retention
PORR
Table A-4
Characteristic
and the assert level V
CQOUT
Rating
Table A-14. Voltage Regulator - Capacitive Loads
unless otherwise noted
no valid oscillation is detected, the MCU will start using the internal self
Table A-15. Startup Characteristics
MC9S12HZ256 Data Sheet, Rev. 2.05
PORA
are derived from the VDD supply. They are also valid
uposc
C
Symbol
C
DDPLLext
Symbol
PW
PW
DDext
V
V
n
t
.
PORR
PORA
WRS
RST
RSTL
IRQ
Min
200
90
0.97
Min
192
20
2
Appendix A Electrical Characteristics
Typical
440
220
Typ
12000
5000
Max
Max
2.07
196
14
Unit
nF
nF
Unit
n
t
t
osc
ns
cyc
osc
V
V
641