mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 274
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
- Current page: 274 of 692
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Chapter 9 Motor Controller (MC10B8CV1)
9.4.1.2
The pair of motor controller channels cannot be placed into dual full H-bridge mode unless both motor
controller channels have been enabled (MCAM[1:0] not equal to 00) and dual full H-bridge mode is
selected for both PWM channels (MCOM[1:0] = 11). If only one channel is set to dual full H-bridge mode,
this channel will operate in full H-bridge mode, the other as programmed.
9.4.1.3
9.4.1.3.1
Each PWM channel can be programmed individually to three different alignment modes. The mode is
determined by the MCAM[1:0] bits in the corresponding channel control register.
Left aligned (MCAM[1:0] = 01): The output will start active (low if RECIRC = 0 or high if RECIRC = 1)
and will turn inactive (high if RECIRC = 0 or low if RECIRC = 1) after the number of counts specified by
the corresponding duty cycle register.
274
PWM Channel x + 1
PWM Channel x
Relationship Between PWM Mode and PWM Channel Enable
Relationship Between Sign, Duty, Dither, RECIRC, Period,
and PWM Mode Functions
PWM Alignment Modes
Figure 9-11. Typical Quad Half H-Bridge Mode Configuration
MnC0P
MnC0M
MnC1P
MnC1M
MC9S12HZ256 Data Sheet, Rev. 2.05
Released
PWM Output
Released
PWM Output
V
V
DDM
SSM
Freescale Semiconductor
V
V
DDM
SSM
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