mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 126

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 4 Port Integration Module (PIM9HZ256V2)
4.3.1.2
Read: Anytime. Write: Never; writes to these registers have no effect.
If the ATDDIEN1 bit of the associated I/O pin is set to 0 (digital input buffer is disabled), a read returns a
1. If the ATDDIEN1 bit of the associated I/O pin is set to 1 (digital input buffer is enabled), a read returns
the status of the associated pin.
4.3.1.3
Read: Anytime. Write: Anytime.
This register configures port pins PAD[7:0] as either input or output.
If a data direction bit is 0 (pin configured as input), then a read value on PTADx depends on the associated
ATDDIEN1 bit. If the associated ATDDIEN1 bit is set to 1 (digital input buffer is enabled), a read on
PTADx returns the value on port AD pin. If the associated ATDDIEN1 bit is set to 0 (digital input buffer
is disabled), a read on PTADx returns a 1.
126
DDRAD[7:0]
Reset
Reset
Field
7:0
W
W
R
R
DDRAD7
PTIAD7
Data Direction Port AD
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Port AD Input Register (PTIAD)
Port AD Data Direction Register (DDRAD)
1
0
7
7
= Reserved or Unimplemented
DDRAD6
PTIAD6
1
0
6
6
Figure 4-4. Port AD Data Direction Register (DDRAD)
Figure 4-3. Port AD Input Register (PTIAD)
Table 4-3. DDRAD Field Descriptions
DDRAD5
PTIAD5
MC9S12HZ256 Data Sheet, Rev. 2.05
1
0
5
5
DDRAD4
PTIAD4
1
0
4
4
Description
DDRAD3
PTIAD3
1
0
3
3
DDRAD2
PTIAD2
1
0
2
2
DDRAD1
PTIAD1
Freescale Semiconductor
1
0
1
1
DDRAD0
PTIAD0
1
0
0
0