mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 361

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Write: For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 12.3.2.11, “MSCAN Transmit Buffer Selection Register
receive buffers.
Reset: Undefined (0x00XX) because of RAM-based implementation
12.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
12.3.3.1.1
Freescale Semiconductor
ID[28:21]
Register
Field
Name
IDR0
IDR1
IDR2
IDR3
7:0
Reset:
W
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Identifier Registers (IDR0–IDR3)
Figure 12-22. Receive/Transmit Message Buffer — Standard Identifier Mapping
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
W
W
W
W
R
R
R
R
IDR0–IDR3 for Extended Identifier Mapping
ID28
7
x
Figure 12-23. Identifier Register 0 (IDR0) — Extended Identifier Mapping
Bit 7
ID10
ID2
Table 12-26. IDR0 Register Field Descriptions — Extended
ID27
= Unused, always read ‘x’
6
x
ID9
ID1
6
MC9S12HZ256 Data Sheet, Rev. 2.05
ID26
5
x
ID8
ID0
5
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
ID25
4
x
Description
RTR
ID7
4
ID24
IDE (=0)
x
3
Section 12.3.2.7, “MSCAN Transmitter
(CANTBSEL)”). Unimplemented for
ID6
3
ID23
2
x
ID5
2
ID22
ID4
x
1
1
ID21
Bit 0
ID3
0
x
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