mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 512

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 18 Background Debug Module (BDMV4)
18.3
A summary of the registers associated with the BDM is shown in
host-driven communications to the BDM hardware using READ_BD and WRITE_BD commands.
Detailed descriptions of the registers and associated bits are given in the subsections that follow.
18.3.1
512
Memory Map and Register Definition
Register
Address
Module Memory Map
8–
7
Reserved
BDM Status Register (BDMSTS)
Reserved
BDM CCR Holding Register (BDMCCR)
BDM Internal Register Position (BDMINR)
Reserved
MC9S12HZ256 Data Sheet, Rev. 2.05
Table 18-1. INT Memory Map
Use
Figure
18-2. Registers are accessed by
Freescale Semiconductor
Access
R/W
R/W
R

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