mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 540

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 19 Debug Module (DBGV1)
19.3
A summary of the registers associated with the DBG sub-block is shown in
descriptions of the registers and bits are given in the subsections that follow.
19.3.1
19.3.2
This section consists of the DBG register descriptions in address order. Most of the register bits can be
written to in either BKP or DBG mode, although they may not have any effect in one of the modes.
However, the only bits in the DBG module that can be written while the debugger is armed (ARM = 1) are
DBGEN and ARM
540
DBGSC
DBGC1
Name
Memory Map and Register Definition
Address
1
Offset
Module Memory Map
Register Descriptions
A
B
E
F
4
5
6
8
9
W
W
R
R
Debug Control Register (DBGC1)
Debug Status and Control Register (DBGSC)
Debug Trace Buffer Register High (DBGTBH)
Debug Trace Buffer Register Low (DBGTBL)
Debug Control Register 2 (DBGC2) / (BKPCT0)
Debug Control Register 3 (DBGC3) / (BKPCT1)
Debug Comparator A Extended Register (DBGCAX) / (/BKP0X)
Debug Comparator A Register High (DBGCAH) / (BKP0H)
Debug Comparator A Register Low (DBGCAL) / (BKP0L)
Debug Comparator B Extended Register (DBGCBX) / (BKP1X)
Debug Comparator B Register High (DBGCBH) / (BKP1H)
Debug Comparator B Register Low (DBGCBL) / (BKP1L)
Debug Count Register (DBGCNT)
Debug Comparator C Extended Register (DBGCCX)
Debug Comparator C Register High (DBGCCH)
Debug Comparator C Register Low (DBGCCL)
DBGEN
Bit 7
AF
= Unimplemented or Reserved
Figure 19-3. DBG Register Summary
ARM
BF
MC9S12HZ256 Data Sheet, Rev. 2.05
6
Table 19-2. DBG Memory Map
TRGSEL
CF
5
Use
BEGIN
4
0
DBGBRK
3
Figure
2
0
TRG
19-3. Detailed
Freescale Semiconductor
Access
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
CAPMOD
R
R
R
Bit 0