mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 399

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13.3.2.6
Read: anytime; reading accesses SCI receive data register
Write: anytime; writing accesses SCI transmit data register; writing to R8 has no effect
Freescale Semiconductor
Reset
Reset
R[7:0]
T[7:0}
Field
Field
7:0
R8
T8
7
6
W
W
R
R
Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1).
Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1).
Received bits 7 through 0 — For 9-bit or 8-bit data formats
Transmit bits 7 through 0 — For 9-bit or 8-bit formats
R8
R7
T7
SCI Data Registers (SCIDRH and SCIDRL)
0
0
7
7
If the value of T8 is the same as in the previous transmission, T8 does not
have to be rewritten.The same value is transmitted until T8 is rewritten
In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.
When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH) then to SCIDRL.
= Unimplemented or Reserved
R6
T8
T6
0
0
6
6
Figure 13-10. SCI Data Register Low (SCIDRL)
Figure 13-9. SCI Data Register High (SCIDRH)
Table 13-10. SCIDRL Field Descriptions
Table 13-9. SCIDRH Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
R5
T5
0
0
0
5
5
NOTE
R4
T4
0
0
0
4
4
Description
Description
R3
T3
0
0
0
3
3
Chapter 13 Serial Communication Interface (SCIV4)
R2
T2
0
0
0
2
2
R1
T1
0
0
0
1
1
R0
T0
0
0
0
0
0
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