mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 389
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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13.1.3.3
The SCI is inactive during stop mode for reduced power consumption. The STOP instruction does not
affect the SCI register states, but the SCI bus clock will be disabled. The SCI operation resumes after an
external interrupt brings the CPU out of stop mode. Exiting stop mode by reset aborts any transmission or
reception in progress and resets the SCI.
13.1.4
Figure 13-1
blocks.
Freescale Semiconductor
Bus Clk
RXD
Data In
Block Diagram
is a high level block diagram of the SCI module, showing the interaction of various function
Stop Mode
Generator
BAUD
Decoder
Infrared
Receive & Wakeup Control
Transmit Shift Register
16
MC9S12HZ256 Data Sheet, Rev. 2.05
Figure 13-1. SCI Block Diagram
Transmit Control
Receive Shift Register
SCI Data Register
SCI Data Register
Data Format Control
Encoder
Infrared
Chapter 13 Serial Communication Interface (SCIV4)
Generation
Generation
IRQ
IRQ
RDRF/OR
Interrupt
Request
TDRE
Interrupt
Request
IDLE Interrupt Request
TC Interrupt Request
Data Out
Interrupt
Request
SCI
TXD
389
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