mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 491

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

16.3.2.13 Main Timer Interrupt Flag 2 (TFLG2)
TFLG2 indicates when interrupt conditions have occurred. To clear a bit in the flag register, write the bit
to one.
Read: Anytime
Write: Used in clearing mechanism (set bits cause corresponding bits to be cleared).
Any access to TCNT will clear TFLG2 register if the TFFCA bit in TSCR register is set.
16.3.2.14 Timer Input Capture/Output Compare Registers High and Low 0–7
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value of the
free-running counter when a defined transition is sensed by the corresponding input capture edge detector
or to trigger an output action for output compare.
Read: Anytime
Freescale Semiconductor
Reset
Field
TOF
7
W
Reset
R
Reset
W
R
W
R
TOF
Timer Overflow Flag — Set when 16-bit free-running timer overflows from 0xFFFF to 0x0000. This bit is cleared
automatically by a write to the TFLG2 register with bit 7 set. (See also TCRE control bit explanation.)
(TCxH and TCxL)
0
7
Figure 16-22. Timer Input Capture/Output Compare Register x High (TCxH)
Bit 15
Figure 16-23. Timer Input Capture/Output Compare Register x Low (TCxL)
15
Bit 7
0
0
7
Unimplemented or Reserved
0
0
6
Bit 14
Figure 16-21. Main Timer Interrupt Flag 2 (TFLG2)
14
Bit 6
0
0
6
Table 16-16. TRLG2 Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
5
Bit 13
13
Bit 5
0
0
5
Bit 12
0
0
4
12
Bit 4
0
0
4
Description
Bit 11
0
0
3
11
Bit 3
0
0
3
Chapter 16 Timer Module (TIM16B8CV1)
Bit 10
0
0
2
10
Bit 2
0
0
2
Bit 9
0
0
1
Bit 1
0
9
0
1
Bit 8
0
0
Bit 0
0
0
0
0
0
491