mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 162
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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Chapter 4 Port Integration Module (PIM9HZ256V2)
4.4.6
The Polarity Select Register selects either a pull-up or pull-down device if enabled. The pull device
becomes active only if the pin is used as an input or as a wired-or output.
4.4.7
The following table summarizes the effect of various configuration in the Data Direction (DDR),
Input/Output (I/O), reduced drive (RDR), Pull Enable (PE), Pull Select (PS) and Interrupt Enable (IE)
register bits. The PS configuration bit is used for two purposes:
1
2
162
DDR
Applicable only on Port AD.
Digital outputs are disabled and digital input logic is forced to “1” when an analog module associated with the port is enabled.
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pull-up or pull-down device if PE is set to “1”.
IO
X
X
X
X
X
X
X
0
1
0
1
0
1
0
1
Polarity Select Register
Pin Configuration Summary
RDR
X
X
X
X
X
X
X
0
0
1
1
0
0
1
1
PE
X
X
X
X
X
X
X
X
0
1
1
0
0
1
1
Table 4-40. Pin Configuration Summary
PS
X
X
X
X
X
0
1
0
1
0
1
0
1
0
1
MC9S12HZ256 Data Sheet, Rev. 2.05
IE
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
Output to 0, Reduced Drive
Output to 1, Reduced Drive
Output to 0, Reduced Drive
Output to 1, Reduced Drive
Output to 0, Full Drive
Output to 1, Full Drive
Output to 0, Full Drive
Output to 1, Full Drive
Function
Input
Input
Input
Input
Input
Input
Input
2
Pull Device
Pull Down
Pull Down
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Pull Up
Pull Up
Freescale Semiconductor
Falling Edge
Rising Edge
Falling Edge
Rising Edge
Falling Edge
Rising Edge
Falling Edge
Rising Edge
Interrupt
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
Disabled
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