mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 334

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
12.1.2
The basic features of the MSCAN are as follows:
12.1.3
The following modes of operation are specific to the MSCAN. See
for details.
12.2
The MSCAN uses two external pins:
12.2.1
RXCAN is the MSCAN receiver input pin.
1. Depending on the actual bit timing and the clock jitter of the PLL.
334
Implementation of the CAN protocol — Version 2.0A/B
— Standard and extended data frames
— Zero to eight bytes data length
— Programmable bit rate up to 1 Mbps
— Support for remote frames
Five receive buffers with FIFO storage scheme
Three transmit buffers with internal prioritization using a “local priority” concept
Flexible maskable identifier filter supports two full-size (32-bit) extended identifier filters, or four
16-bit filters, or eight 8-bit filters
Programmable wakeup functionality with integrated low-pass filter
Programmable loopback mode supports self-test operation
Programmable listen-only mode for monitoring of CAN bus
Separate signalling and interrupt capabilities for all CAN receiver and transmitter error states
(warning, error passive, bus-off)
Programmable MSCAN clock source either bus clock or oscillator clock
Internal timer for time-stamping of received and transmitted messages
Three low-power modes: sleep, power down, and MSCAN enable
Global initialization of configuration registers
Listen-Only Mode
MSCAN Sleep Mode
MSCAN Initialization Mode
MSCAN Power Down Mode
External Signal Description
Features
Modes of Operation
RXCAN — CAN Receiver Input Pin
MC9S12HZ256 Data Sheet, Rev. 2.05
1
Section 12.4, “Functional
Freescale Semiconductor
Description,”

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