mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 444

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Chapter 15 Pulse-Width Modulator (PWM8B6CV1)
444
1
2
3
4
PWMTST is intended for factory test purposes only.
PWMPRSC is intended for factory test purposes only.
PWMSCNTA is intended for factory test purposes only.
PWMSCNTB is intended for factory test purposes only.
Address
0x000A
0x000B
0x000C
0x000D
0x000E
0x001A
0x001B
0x001C
0x001D
0x001E
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
0x0016
0x0017
0x0018
0x0019
Offset
PWM Enable Register (PWME)
PWM Polarity Register (PWMPOL)
PWM Clock Select Register (PWMCLK)
PWM Prescale Clock Select Register (PWMPRCLK)
PWM Center Align Enable Register (PWMCAE)
PWM Control Register (PWMCTL)
PWM Test Register (PWMTST)
PWM Prescale Counter Register (PWMPRSC)
PWM Scale A Register (PWMSCLA)
PWM Scale B Register (PWMSCLB)
PWM Scale A Counter Register (PWMSCNTA)
PWM Scale B Counter Register (PWMSCNTB)
PWM Channel 0 Counter Register (PWMCNT0)
PWM Channel 1 Counter Register (PWMCNT1)
PWM Channel 2 Counter Register (PWMCNT2)
PWM Channel 3 Counter Register (PWMCNT3)
PWM Channel 4 Counter Register (PWMCNT4)
PWM Channel 5 Counter Register (PWMCNT5)
PWM Channel 0 Period Register (PWMPER0)
PWM Channel 1 Period Register (PWMPER1)
PWM Channel 2 Period Register (PWMPER2)
PWM Channel 3 Period Register (PWMPER3)
PWM Channel 4 Period Register (PWMPER4)
PWM Channel 5 Period Register (PWMPER5)
PWM Channel 0 Duty Register (PWMDTY0)
PWM Channel 1 Duty Register (PWMDTY1)
PWM Channel 2 Duty Register (PWMDTY2)
PWM Channel 3 Duty Register (PWMDTY3)
PWM Channel 4 Duty Register (PWMDTY4)
PWM Channel 5 Duty Register (PWMDTY5)
PWM Shutdown Register (PWMSDN)
Table 15-1. PWM8B6C Memory Map
MC9S12HZ256 Data Sheet, Rev. 2.05
1
Register
2
3
4
Freescale Semiconductor
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W