mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 266

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Chapter 9 Motor Controller (MC10B8CV1)
9.3.2.2
This register controls the behavior of the analog section of the motor controller as well as the interrupt
enables.
266
.
Reset
RECIRC
MCTOIE
Field
7
0
W
R
RECIRC
0 Recirculation on the high side transistors. Active state for PWM output is logic low, the static channel will
1 Recirculation on the low side transistors. Active state for PWM output is logic high, the static channel will
0 Interrupt disabled.
1 Interrupt enabled. An interrupt will be generated when the motor controller timer counter overflow interrupt flag
Recirculation in (Dual) Full H-Bridge Mode (refer to
Motor Controller Timer Counter Overflow Interrupt Enable
Motor Controller Control Register 1
7
0
output logic high.
output logic low.
(MCTOIF) is set.
the outputs in (dual) full H-bridge modes. In half H-bridge mode, the PWM output is always active low.
RECIRC = 1 will also invert the effect of the S bits (refer to
H-bridge modes. RECIRC must be changed only while no PWM channel is operating in (dual) full H-bridge
mode; otherwise, erroneous output pattern may occur.
= Unimplemented or Reserved
Figure 9-4. Motor Controller Control Register 1 (MCCTL1)
6
0
0
Table 9-4. MCCTL1 Field Descriptions
MC9S12HZ256 Data Sheet, Rev. 2.05
MCPRE[1:0]
5
0
0
Table 9-3. Prescaler Values
00
01
10
11
4
0
0
Description
Section 9.4.1.3.3, “RECIRC
f
f
f
Bus
Bus
Bus
f
f
Bus
TC
3
0
0
/2
/4
/8
Section 9.4.1.3.2, “Sign Bit
2
0
0
Bit”)— RECIRC only affects
Freescale Semiconductor
(S)”) in (dual) full
1
0
0
MCTOIE
0
0

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