mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 129
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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4.3.1.8
Read: Anytime. Write: Anytime.
Each flag is set by an active edge on the associated input pin. The active edge could be rising or falling
based on the state of the corresponding PPSADx bit. To clear each flag, write “1” to the corresponding
PIFADx bit. Writing a “0” has no effect.
Freescale Semiconductor
PIFAD[7:0]
Reset
Field
7:0
W
R
PIFAD7
Interrupt Flags Port AD
0 No active edge pending. Writing a “0” has no effect.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set).
Port AD Interrupt Flag Register (PIFAD)
0
7
Writing a “1” clears the associated flag.
If the ATDDIEN1 bit of the associated pin is set to 0 (digital input buffer is
disabled), active edges can not be detected.
PIFAD6
0
6
Figure 4-9. Port AD Interrupt Flag Register (PIFAD)
Table 4-8. PIFAD Field Descriptions
PIFAD5
MC9S12HZ256 Data Sheet, Rev. 2.05
0
5
PIFAD4
NOTE
0
4
Description
PIFAD3
0
3
Chapter 4 Port Integration Module (PIM9HZ256V2)
PIFAD2
0
2
PIFAD1
0
1
PIFAD0
0
0
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