mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 462
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mc9s12hz256v2
Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12HZ256V2.pdf
(692 pages)
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Chapter 15 Pulse-Width Modulator (PWM8B6CV1)
15.3.2.15 PWM Shutdown Register (PWMSDN)
The PWMSDN register provides for the shutdown functionality of the PWM module in the emergency
cases.
Read: anytime
Write: anytime
462
PWMRSTRT
PWM5ENA
PWM5INL
PWMLVL
PWM5IN
PWMIE
PWMIF
Reset
Field
7
6
5
4
2
1
0
W
R
PWMIF
PWM Interrupt Flag — Any change from passive to asserted (active) state or from active to passive state will be
flagged by setting the PWMIF flag = 1. The flag is cleared by writing a logic 1 to it. Writing a 0 has no effect.
0 No change on PWM5IN input.
1 Change on PWM5IN input
PWM Interrupt Enable — If interrupt is enabled an interrupt to the CPU is asserted.
0 PWM interrupt is disabled.
1 PWM interrupt is enabled.
PWM Restart — The PWM can only be restarted if the PWM channel input 5 is deasserted. After writing a logic 1
to the PWMRSTRT bit (trigger event) the PWM channels start running after the corresponding counter passes
next “counter = 0” phase.
Also, if the PWM5ENA bit is reset to 0, the PWM do not start before the counter passes 0x0000.
The bit is always read as 0.
PWM Shutdown Output Level — If active level as defined by the PWM5IN input, gets asserted all enabled PWM
channels are immediately driven to the level defined by PWMLVL.
0 PWM outputs are forced to 0
1 PWM outputs are forced to 1.
PWM Channel 5 Input Status — This reflects the current status of the PWM5 pin.
PWM Shutdown Active Input Level for Channel 5 — If the emergency shutdown feature is enabled
(PWM5ENA = 1), this bit determines the active level of the PWM5 channel.
0 Active level is low
1 Active level is high
PWM Emergency Shutdown Enable — If this bit is logic 1 the pin associated with channel 5 is forced to input
and the emergency shutdown feature is enabled. All the other bits in this register are meaningful only if
PWM5ENA = 1.
0 PWM emergency feature disabled.
1 PWM emergency feature is enabled.
0
7
= Unimplemented or Reserved
PWMIE
0
6
Figure 15-33. PWM Shutdown Register (PWMSDN)
Table 15-10. PWMSDN Field Descriptions
PWMRSTRT
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
5
PWMLVL
0
4
Description
0
0
3
PWM5IN
0
2
PWM5INL
Freescale Semiconductor
0
1
PWM5ENA
0
0
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