mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 131

• Manufacturer Part Number: mc9s12hz256v2
• Description: Hcs12 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

4.3.2.2
Read: Anytime. Write: Never, writes to this register have no effect.
If the LCD frontplane driver of an associated I/O pin is enabled (and LCD module is enabled) or the
associated ATDDIEN0 bit is set to 0 (digital input buffer is disabled), a read returns a 1.
If the LCD frontplane driver of an associated I/O pin is disabled (or LCD module is disabled) and the
associated ATDDIEN0 bit is set to 1 (digital input buffer is enabled), a read returns the status of the
associated pin.
4.3.2.3
Read: Anytime. Write: Anytime.
This register configures port pins PL[7:0] as either input or output.
If a LCD frontplane driver is enabled (and LCD module is enabled), it outputs an analog signal to the
corresponding pin and the associated Data Direction Register bit has no effect. If a LCD frontplane driver
is disabled (or LCD module is disabled), the corresponding Data Direction Register bit reverts to control
the I/O direction of the associated pin.
Freescale Semiconductor
DDRL[7:0]
Reset
Reset
Field
7:0
W
W
R
R
DDRL7
PTIL7
Data Direction Port L
0 Associated pin is configured as input.
1 Associated pin is configured as output.
Port L Input Register (PTIL)
Port L Data Direction Register (DDRL)
1
0
7
7
= Reserved or Unimplemented
DDRL6
PTIL6
1
0
6
6
Figure 4-12. Port L Data Direction Register (DDRL)
Figure 4-11. Port L Input Register (PTIL)
Table 4-9. DDRL Field Descriptions
DDRL5
PTIL5
MC9S12HZ256 Data Sheet, Rev. 2.05
1
0
5
5
DDRL4
PTIL4
1
0
4
4
Description
DDRL3
PTIL3
1
0
3
3
Chapter 4 Port Integration Module (PIM9HZ256V2)
DDRL2
PTIL2
1
0
2
2
DDRL1
PTIL1
1
0
1
1
DDRL0
PTIL0
1
0
0
0
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