mc9s12hz256v2 Freescale Semiconductor, Inc, mc9s12hz256v2 Datasheet - Page 187

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mc9s12hz256v2

Manufacturer Part Number
mc9s12hz256v2
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
The sequence for clock quality check is shown in
1. A Clock Monitor Reset will always set the SCME bit to logical’1’
Freescale Semiconductor
POR
check window
Clock OK
or clock monitor reset
check the OSCCLK signal.
LVR
Remember that in parallel to additional actions caused by self-clock mode
osc ok
num=0
OSCCLK
active?
SCM
VCO
clock
?
yes
no
exit full stop
no
yes
Figure 5-20. Sequence for Clock Quality Check
1
CM fail
1 2 3 4 5
Figure 5-19. Check Window Example
Switch to OSCCLK
MC9S12HZ256 Data Sheet, Rev. 2.05
check window
1
2
handling the clock quality checker continues to
num=num+1
Exit SCM
num<50
3
?
yes
NOTE
Clock Monitor Reset
Enter SCM
Figure
4095
osc ok
no
4096
5-20.
yes
Chapter 5 Clocks and Reset Generator (CRGV4)
SCME=1
active?
SCM
49999
?
no
yes
no
50000
num=50
187

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